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Established in 2018, Power Master Semiconductor (PMS) is a South Korean company with a team boasting over two decades of experience in the power semiconductor industry. The company is focused on developing and producing advanced Silicon Carbide (SiC) diodes and MOSFETs, alongside Super-Junction (SJ) MOSFETs, particularly their innovative eMOS E7 line.
eMOS E7 and eSiC MOSFET technologies
The eMOS E7 super-junction technology provides fast switching performance with low switching noise and overshoot spikes. This results in the system’s reliability and excellent ruggedness.
The robust avalanche capability of eMOS E7 is suitable for hard switching applications and the robust intrinsic body diode performance of eMOS E7 enables system reliability in soft switching topologies such as LLC resonant converters or ZVS phase-shifted full bridge converters. Consequently, the eMOS E7 family is suitable for many applications requiring superior efficiency and higher power density, such as consumer, industrial, and automotive applications.
Today, the power conversion industry poses several challenges in automotive and industrial applications, such as renewable energy, motor drives, onboard chargers (OBCs), e-compressors, and traction inverters. Additionally, the rapid growth of Artificial Intelligence (AI) is driving a significant demand for energy in data centers. Modern server Power Supply Units (PSU) aim to meet the 80 Plus Titanium standard, requiring over 96% peak efficiency at halfloads.
PMS is addressing these challenges through its eSiC MOSFET technology. eSiC MOSFETs enable innovative, high-performance PSU designs that further shrink footprints while addressing thermal and electromagnetic interference challenges. According to PMS, eSiC MOSFETs offer excellent switching performance, a stable threshold voltage for parallel operation, and 100% tested avalanche capability.
As efficiency and power density become increasingly important and the price of SiC continues to go down, the replacement of Si by SiC will accelerate, and SiC will play an important role in both industrial and automotive applications.
Benefits of eSiC MOSFET technology
The eSiC Gen1 technology was designed to achieve high efficiency and reliability over the entire load by minimizing dynamic COSS and switching losses and improving avalanche ruggedness in hard and soft switching topologies.
As shown in Figure 1, a unique advantage of the eSiC MOSFET over competitor’s planar and trench SiC MOSFETs is the lower voltage overshoot, even though lower turn-off switching loss by higher dv/dt.
According to the company, the figures of merit (FOMs) of the next generation eSiC MOSFET, which will be released this year, are expected to be similar to or surpass those of the latest competitor’s SiC MOSFETs. The Gen2 eSiC MOSFET improves FOMs (EOSS*RDS(ON) and QOSS*RDS(ON)) by 33% and QG*RDS(ON) FOMs by 40% compared to the Gen1 eSiC MOSFET. Switching loss of the Gen2 e SiC MOSFET is 40% improved compared to the Gen1 eSiC MOSFET.
Reliability aspects
To ensure that SiC MOSFETs can withstand demanding environments and maintain their performance over extended periods, PMS is conducting dynamic HTGB (High-Temperature Gate Bias) tests to evaluate the stability of the gate oxide under high temperature and voltage conditions.
The body diode tests help to understand the behavior and durability of the body diode under repetitive switching and high current scenarios. In contrast, the long-term endurance tests, conducted for more than 3,000 hours under normal bias conditions, provide insights into the devices’ long-term reliability and potential failure mechanisms.
A relevant challenge of SiC power devices is the threshold voltage drift, mainly resulting from the SiC’s thin gate oxide thickness compared to silicon. When the same gate bias is applied to the gate in MOSFET, a higher electric field is induced in the thinner gate oxide. The stability of gate oxide is strongly affected by the strength of the electric field.
By reducing the charge in the oxide and/or interface-state trap densities, it should be possible to reduce the threshold voltage drift in SiC and prevent the gate-stress conditions from having an impact on the gate oxide’s quality. Various approaches are under development to stabilize the threshold voltage drift. In addition, the device design is also considered to shield the electric field in gate oxide at harsh operating conditions.
To effectively evaluate defects affecting gate oxide reliability in SiC MOSFETs, PMS uses several key methodologies. HTGB testing, both positive and negative, is a standard approach to assessing gate oxide integrity under stress. To determine the gate oxide’s lifespan under continuous stress conditions, Time-Dependent Dielectric Breakdown (TDDB) tests are conducted. Bias Temperature Instability (BTI) tests are also performed to evaluate how the gate oxide responds to prolonged voltage stress and temperature variations.
Additionally, Power Master Semiconductor has conducted burn-in tests during mass production to screen out early-life failures caused by gate oxide defects. These comprehensive evaluation methods ensure a thorough understanding and robust assessment of gate oxide reliability in SiC MOSFETs.
According to PMS, in terms of reliability with the gate structure, the planar gate structure shows better stability than the trench gate structure since the electric field is easily protected by the adjacent p-wells. However, in the trench gate structure, a high electric field is induced at the bottom of the trench, which will degrade significantly. To overcome this issue, various protection schemes can be applied such as thick bottom oxide, additional p-layer under trench bottom of gate oxide, deep P-well, and so on.
SiC in power conversion design
SiC technology has resulted in significant benefits, including higher system efficiency, reduced system size and weight, and lower switching losses due to its negligible reverse recovery charge in various power conversion topologies.
SiC MOSFETs are optimized for bridge topologies that can maximize SiC performance. In addition, system power is steadily increasing in this area. For instance, onboard chargers (OBCs) are transitioning from 6.6kW to a range of 11kW to 22kW, and bi-directional operation is becoming a key trend to enable functionalities like V2L (Vehicle to Load), V2G (Vehicle to Grid), V2V (Vehicle to Vehicle), and V2H (Vehicle to home appliance). Similarly, the advent of AI is driving server power requirements from 3kW to 12kW.
However, the system also requires optimizing the limitations of SiC MOSFET. The short circuit withstand time (SCWT) of SiC MOSFETs is known as approximately 3 μs, which is significantly shorter than that of Si IGBT. Therefore, SiC MOSFETs require a unique gate driver with a protection circuit for quick and accurate detecting faults to protect switching devices and systems from a short circuit overcurrent.
In the automotive industry, maintaining extremely low defects per million (dpm) rates is paramount, and this requirement applies equally to SiC MOSFETs as it does to traditional silicon-based semiconductors. To ensure the highest level of reliability, PMS adopts advanced manufacturing processes and stringent quality control measures throughout production.
PMS’s SiC MOSFETs undergo rigorous testing protocols tailored specifically for automotive and industrial applications. These tests include all the test items that are specified in AEC-Q101. Their comprehensive test setup covers environmental stress testing, reliability demonstration tests, electro-thermal stress tests, and mechanical stress tests.
Continuous improvement is integral to the company’s approach, as PMS continuously refines its products through ongoing research and development efforts. Furthermore, PMS actively monitors the field performance of its SiC MOSFETs, ensuring their reliability over the operational lifespan.
To address automotive customer concerns, PMS also provides detailed documentation about reliability testing procedures and results in PPAP format.
Regarding semiconductor manufacturing, PMS believes the SiC market is expected to drive continuous growth in demand for 8-inch wafers in the future. The overall view is that it’s not easy to secure competitive cost and quality until 2028. This seems to be the common opinion of most SiC wafer suppliers.
Meanwhile, 8-inch silicon can be considered to create relatively high value, such as GaN, rather than traditional products (such as SJ MOS / IGBTs), and can also operate products targeted as a niche market, such as MV MOS which is over 200V. The 8-inch silicon manufacturing technology will have a significant role when the 6-inch SiC moves to 8-inch SiC.
The post Pushing the limits with SiC and Super-Junction power technologies appeared first on Power Electronics News.
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